Computer systems frequently are called upon to receive data from external sources. When such data has an unknown temporal relationship to the computer system it is referred to as asynchronous data. In order to detect and store asynchronous data, timing signals are typically provided by the computer system from one or more system clocks. These timing signals, in the form of pulses, are received by various logic and storage elements in the system such as latches or flip-flops. When data is received by such elements, the subsequent receipt of the timing signal allows the element to store the data.
Since the asynchronous data signal and clock signal have no defined relationship they may arrive at the storage element at the same or different times. Normally, a data signal will be latched as soon as a clock signal is received. For example, an edge triggered flip-flop will latch data upon receipt of the leading or trailing edge of the clock pulse. However, a problem may arise if the data signal changes at approximately the same time as the triggering edge of the clock signal. A flip-flop requires the data signal (1) to be present for a predetermined period of time, known as the setup time, prior to receipt of the triggering clock edge, and (2) to remain unchanged for a predetermined period of time, known as the hold time, after receipt of the triggering edge, in order to cleanly latch the signal. If this does not occur, the latched value may be unstable. This so-called "metastable" condition may be characterized by oscillation or ringing of the output of the storage medium.
Asynchronous data may be characterized in two forms. In the first form the data is normally at a low state, transitions to a high state for some time to indicate the new value, and then transitions to the low state (the initial state) again. In the second form the data is at a high state, transitions to a low state for some time to indicate the new value, and then transitions to the high state (the initial state) again. The metastable condition may occur both at the leading edge or the trailing edge of the data signal if the transition of the new value does not meet the setup and hold time as required by the flipflop.
The metastable condition is normally a fairly rare occurrence. For that reason many computer systems rely on the small probability of the event and attempt to correct errors that happen. However, in some applications it is desirable to eliminate the condition.